33. Y. Jin, D. Maliuk, and Y. Makris. 2012. Post-deployment trust evaluation in wireless cryptographic ICs. In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE’12). 965–970. DOI:http://dx.doi.org/10.1109/DATE
. 2012. 6176636.34. Y. Jin and D. Sullivan. 2014. Real-time trust evaluation in integrated circuits. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’14). 1–6. DOI: http://dx.doi.org/ 10.7873/DATE.2014.104.
35. R. Karri, J. Rajendran, K. Rosenfeld, and M. Tehranipoor. 2010. Trustworthy hardware: Identify- ing and classifying hardware Trojans. Computer 43, 10 (Oct. 2010),
36. O. Keren, I. Levin, and M. Karpovsky. 2010. Duplication based one-to-many coding for Trojan HW detection. In Proceedings of the 2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10). 160–166. DOLhttp:// dx.doi.org/10.1109/DFT.2010.26.
37. R. Koch and G. D. Rodosek. 2012. The role of COTS products for high security systems. In Proceedings ofthe 2012 4th International Conference on Cyber Conflict (CYCON’12). 1-14.
38. J. Li and J. Lach. 2008. At-speed delay characterization for IC authentication and Trojan horse detection. In Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008 (HOST’08). 8-14. DOI:http://dx.doi.org/10.1109/
HST.2008.4559038.39. Li, Z. Wasson, and S. A. Seshia. 2012. Reverse engineering circuits using behavioral pattern mining. In Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’12). 83–88. DOI:http://dx.doi.org/10.1109/
HST.2012.6224325.40. L. Lin, W. Burleson, and C. Paar. 2009. MOLES: Malicious off-chip leakage enabled by side-channels. In Proceedings of the IEEE/АСМ International Conference on Computer-Aided Design — Digest of Technical Papers, 2009 (ICCAD’09). 117–122.
41. Liu and B. Wang. 2014. Embedded reconfigurable logic for ASIC design obfuscation against supply chain at- tacks. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’14). 1–6. DOI:http://dx.doi
. org/10.7873/D ATE.2014.256.42. Liu, J. Rajendran, C. Yang, and R. Karri. 2014b. Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security- driven task scheduling. IEEE Transactions on Emerging Topics in Computing 2, 4 (Dec. 2014), 461–472. DOI: http:// dx.doi.org/10.1109/TETC.2014.2348182.
43. Y. Liu, K. Huang, and Y. Makris. 2014a. Hardware Trojan detection through golden chip-free statistical side-channel fingerprinting. In Proceedings of the 2014 51st ACM/EDAC/ IEEE Design Automation Conference (DAC’14). 1–6.
44. E. Love, Y. Jin, and Y. Makris. 2011. Enhancing security via provably trustworthy hardware intellectual property. In Proceedings of the 2011 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’11). 12–17. DOI:http://dx.doi.org/10.1109/HST.2011.5954988
.45. D. McIntyre, F. Wolff, C. Papachristou, and S. Bhunia. 2010. Trustworthy computing in a multi-core system using distributed scheduling. In Proceedings of the 2010 IEEE 16th International On-Line Testing Symposium (IOLTS’10). 211–213. DOEhttp:// dx.doi.org/10.1109ffOLTS.2010.5560200.
46. S. Narasimhan, X. Wang, D. Du, R. S. Chakraborty, and S. Bhunia. 2011. TeSR: A robust temporal self-referencing approach for hardware Trojan detection. In Proceedings of the 2011 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’ll). 71–74. DOI:http://dx.doi.org/10.1109/
HST.2011.5954999.47. S. Narasimhan, W. Yueh, X. Wang, S. Mukhopadhyay, and S. Bhunia. 2012. Improving IC security against Trojan attacks through integration of security monitors. IEEE Design Test of Computers 29, 5 (Oct. 2012), 37–46. DOI:http://dx.doi
. org/10.1109/MDT.2012.2210183.48. M. Oya, Youhua Shi, M. Yanagisawa, and N. Togawa. 2015. A score-based classification method for identi- fying hardware-Trojans at gate-level netlists. In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE’15). 465–470.
49. J. Rajendran, V. Jyothi, O. Sinanoglu, and R. Karri. 2011. Design and analysis of ring oscillator based design-for-trust technique. In Proceedings of the 2011 IEEE 29th VLSI Test Symposium (VTS’ll). 105–110. DOI:http://dx.doi.org/10.1109/
VTS.2011.5783766.50. J. Rajendran, М. Sam, О. Sinanoglu, and R. Karri. 2013. Security analysis of integrated circuit camouflaging. In Proceedings of the 2013 ACM SIGSAC Conference on Computer & Communications Security (CCS’13). ACM, New York, NY, 709–720. DOI: http:// dx.doi.org/10.1145/2508859.2516656.